193 search results - page 18 / 39 » The TigerSHARC DSP Architecture |
ISCAS
2005
IEEE
15 years 4 months ago
2005
IEEE
—In this paper, we describe an automated and formalized methodology for partitioning computational intensive applications between reconfigurable hardware blocks of different gran...
FPL
2005
Springer
15 years 4 months ago
2005
Springer
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
104
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ASPDAC
2004
ACM
15 years 4 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
102
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SAC
2004
ACM
15 years 4 months ago
2004
ACM
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
82
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DAC
1999
ACM
15 years 3 months ago
1999
ACM
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...