193 search results - page 31 / 39 » The TigerSHARC DSP Architecture |
ISCAS
2003
IEEE
15 years 4 months ago
2003
IEEE
The goal of the research is twofold First, the derivation of a design methodology for FIR filters implementation based on Residue Number System (RNS), aiming at power, delay and h...
DATE
2002
IEEE
15 years 4 months ago
2002
IEEE
The minimization of cost, power consumption and timeto-market of DSP applications requires the development of methodologies for the automatic implementation of floating-point alg...
VLSID
2004
IEEE
15 years 11 months ago
2004
IEEE
The design of any application on a configurable System-on-a-Chip (SoC) like Atmel's FPSLIC is subject to a lot of constraints stemming from requirements of the application an...
VLSISP
2002
14 years 10 months ago
2002
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
DAC
2006
ACM
15 years 5 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...