: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus bas...
In this short paper we examine the integration of three emerging trends in Information Technology (Utility Computing, Grid Computing, and Web Services) into a new Computing paradig...
Stefan Wesner, Bassem Serhan, Theodosis Dimitrakos...
Abstract. This article proposes a hierarchical architecture for an infrastructure-based overlay network delivering multicast services. Such an overlay network is an alternative to ...
The UNIC code is being developed as part of the DOE’s Nuclear Energy Advanced Modeling and Simulation (NEAMS) program. UNIC is an unstructured, deterministic neutron transport c...
Dinesh K. Kaushik, Micheal Smith, Allan Wollaber, ...