Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
Recently, enabling modularity aspects in Answer Set Programming (ASP) has gained increasing interest to ease the composition of program parts to an overall program. In this paper, ...
Minh Dao-Tran, Thomas Eiter, Michael Fink, Thomas ...
In this paper we show how coalition logic can be reduced to the fusion of a normal modal STIT logic for agency and a standard normal temporal logic for discrete time, and how this...
d abstract) T. Eiter G. Gottlob Y. Gurevich Institut fur Informatik Institut fur Informationssysteme EECS Department Universitat Gie en Technische Universitat Wien University of Mi...