Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
As a result of the increasing availability and processing capacity offered by portable devices, it is important for software providers to offer mobile services that seamlessly int...
Frank Siegemund, Robert Sugar, Alain Gefflaut, Fri...
Abstract-- In this paper, we address the issue of forecasting for periodically measured nonstationary traffic based on statistical time series modeling. Often with time series base...
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...