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DSD
2006
IEEE
90views Hardware» more  DSD 2006»
15 years 3 months ago
Global Analysis of Resource Arbitration for MPSoC
Modern day applications require use of multi-processor systems for reasons of scalability and power efficiency. As more and more applications are integrated on a single device, m...
Akash Kumar, Bart Mesman, Henk Corporaal, Jef L. v...
DATE
2005
IEEE
107views Hardware» more  DATE 2005»
15 years 3 months ago
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
César A. M. Marcon, Ney Laert Vilar Calazan...
BMCBI
2006
132views more  BMCBI 2006»
14 years 10 months ago
Comprehensive quality control utilizing the prehybridization third-dye image leads to accurate gene expression measurements by c
Background: Gene expression profiling using microarrays has become an important genetic tool. Spotted arrays prepared in academic labs have the advantage of low cost and high desi...
Xujing Wang, Shuang Jia, Lisa Meyer, Bixia Xiang, ...
ICPR
2008
IEEE
15 years 4 months ago
Visualization of transitions of developing of hepatitis C virus-associated hepatocellular carcinoma
In our previous study, we visualized microarray data of hepatocellular carcinoma (HCC) by using selforganizing-map, and investigated molecular signature representing the developme...
Takanobu Miyamoto, Yusuke Fujita, Shunji Uchimura,...
DATE
2005
IEEE
99views Hardware» more  DATE 2005»
15 years 3 months ago
A New System Design Methodology for Wire Pipelined SoC
Wire Pipelining (WP) has been proposed in order to limit the impact of increasing wire delays. In general, the added pipeline elements alters the system such that architectural ch...
Mario R. Casu, Luca Macchiarulo