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ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
15 years 5 months ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
WMASH
2004
ACM
15 years 5 months ago
Secure universal mobility for wireless internet
The advent of the mobile wireless Internet has created the need for seamless and secure communication over heterogeneous access networks such as IEEE 802.11, WCDMA, cdma2000, and ...
Ashutosh Dutta, Tao Zhang, Sunil Madhani, Kenichi ...
EGH
2004
Springer
15 years 5 months ago
Mio: fast multipass partitioning via priority-based instruction scheduling
Real-time graphics hardware continues to offer improved resources for programmable vertex and fragment shaders. However, shader programmers continue to write shaders that require ...
Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mar...
ICS
2004
Tsinghua U.
15 years 5 months ago
CQoS: a framework for enabling QoS in shared caches of CMP platforms
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
Ravi R. Iyer
VRML
2003
ACM
15 years 5 months ago
Behavior3D: an XML-based framework for 3D graphics behavior
Success of 3D applications on the Web inherently depends on object behavior and interaction. Current Web3D formats often fall short in supporting behavior modeling. This paper int...
Raimund Dachselt, Enrico Rukzio