Sciweavers

1127 search results - page 112 / 226
» The XIS Generative Programming Techniques
Sort
View
ASPLOS
1992
ACM
15 years 3 months ago
Application-Controlled Physical Memory using External Page-Cache Management
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MIPS range or higher. While this trend suggests that memory management for most p...
Kieran Harty, David R. Cheriton
ASPLOS
1992
ACM
15 years 3 months ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
CGO
2009
IEEE
15 years 3 months ago
Alchemist: A Transparent Dependence Distance Profiling Infrastructure
Effectively migrating sequential applications to take advantage of parallelism available on multicore platforms is a well-recognized challenge. This paper addresses important aspec...
Xiangyu Zhang, Armand Navabi, Suresh Jagannathan
LCPC
2000
Springer
15 years 2 months ago
Improving Offset Assignment for Embedded Processors
Embedded systems consisting of the application program ROM, RAM, the embedded processor core, and any custom hardware on a single wafer are becoming increasingly common in applicat...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
CAV
2008
Springer
131views Hardware» more  CAV 2008»
15 years 1 months ago
Validating High-Level Synthesis
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta