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APSEC
2009
IEEE
15 years 6 months ago
Directed Test Suite Augmentation
Abstract—As software evolves, engineers use regression testing to evaluate its fitness for release. Such testing typically begins with existing test cases, and many techniques h...
Zhihong Xu, Gregg Rothermel
SAC
2009
ACM
15 years 5 months ago
Specifying and checking protocols of multithreaded classes
In the Design By Contract (DBC) approach, programmers specify methods with pre and postconditions (also called contracts). Earlier work added protocols to the DBC approach to desc...
Clément Hurlin
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
15 years 5 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
CGO
2007
IEEE
15 years 5 months ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke
VTS
2007
IEEE
135views Hardware» more  VTS 2007»
15 years 5 months ago
High Level Synthesis of Degradable ASICs Using Virtual Binding
—As the complexity of the integrated circuits increases, they become more susceptible to manufacturing faults, decreasing the total process yield. Thus, it would be desirable to ...
Nima Honarmand, A. Shahabi, Hasan Sohofi, Maghsoud...