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IPPS
2006
IEEE
15 years 3 months ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
IPPS
2006
IEEE
15 years 3 months ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
CHES
2007
Springer
154views Cryptology» more  CHES 2007»
15 years 4 months ago
Multi-gigabit GCM-AES Architecture Optimized for FPGAs
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert ...
ISQED
2009
IEEE
328views Hardware» more  ISQED 2009»
15 years 4 months ago
VLSI architectures of perceptual based video watermarking for real-time copyright protection
For effective digital rights management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. In this paper, we present a wat...
Saraju P. Mohanty, Elias Kougianos, Wei Cai, Manis...
GLVLSI
2003
IEEE
202views VLSI» more  GLVLSI 2003»
15 years 3 months ago
System level design of real time face recognition architecture based on composite PCA
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
Rajkiran Gottumukkal, Vijayan K. Asari