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FPL
2010
Springer
132views Hardware» more  FPL 2010»
14 years 7 months ago
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA
Weirong Jiang, Viktor K. Prasanna, Norio Yamagaki
ANCS
2009
ACM
14 years 7 months ago
High throughput architecture for packet classification using FPGA
Tao Zhang, Yonggang Wang, Lijun Zhang, Yang Yang
FPGA
1999
ACM
115views FPGA» more  FPGA 1999»
15 years 2 months ago
Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
Alexander Marquardt, Vaughn Betz, Jonathan Rose
FPL
1997
Springer
125views Hardware» more  FPL 1997»
15 years 1 months ago
VPR: A new packing, placement and routing tool for FPGA research
We describe the capabilities of and algorithms used in a new FPGA CAD tool, Versatile Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published FPG...
Vaughn Betz, Jonathan Rose