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FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
15 years 2 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
FPGA
2006
ACM
92views FPGA» more  FPGA 2006»
15 years 1 months ago
Embedded floating-point units in FPGAs
Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications. However, it is this nonspecific nature that has limited t...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...
TVLSI
2010
14 years 4 months ago
Design and Implementation of a Sort-Free K-Best Sphere Decoder
:- This paper describes the design and VLSI architecture for a 4x4 breadth first K-Best MIMO decoder using a 64 QAM scheme. A novel sort free approach to path extension, as well as...
Sudip Mondal, Ahmed M. Eltawil, Chung-An Shen, Kha...
ARC
2009
Springer
137views Hardware» more  ARC 2009»
15 years 4 months ago
Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep
This paper argues the case for the use of analytical models in FPGA architecture layout exploration. We show that the problem when simplified, is amenable to formal optimization t...
Asma Kahoul, George A. Constantinides, Alastair M....
FCCM
2008
IEEE
118views VLSI» more  FCCM 2008»
15 years 4 months ago
A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture
We propose a new powerful scalable generic parallel and modular architecture well suited to LDPC code decoding. This architecture template has been instantiated in the case of the...
François Charot, Christophe Wolinski, Nicol...