ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Several recent works have used neural networks to discriminate vigilance states in humans from electroencephalographic (EEG) signals. Our study aims at being more exhaustive. It t...
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
Paris Kitsos, Michalis D. Galanis, Odysseas G. Kou...
In this paper, the EX-VPR tool, which used for architecture level exploration, is presented. This tool belongs to an integrated framework (MEANDER) for mapping applications into a...
K. Siozios, Konstantinos Tatas, George Koutroumpez...