862 search results - page 43 / 173 » The amorphous FPGA architecture |
VLSID
1994
IEEE
15 years 1 months ago
1994
IEEE
In this paper, we propose an architecture synthesis methodolog `to realize cascaded Infinite Impulse Response (IIRJfilter in Table Look Up (TLU) Field Progmmmable Gate A m y s (FP...
DSD
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper addresses the implementation of ReedSolomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
JSA
2010
14 years 4 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
PPL
2007
14 years 9 months ago
2007
The traditional computational devices and models, such as the von Neumann architecture or the Turing machine, are strongly influenced by concepts of central control and perfectio...