862 search results - page 78 / 173 » The amorphous FPGA architecture |
ERSA
2008
14 years 11 months ago
2008
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
AHS
2007
IEEE
14 years 10 months ago
2007
IEEE
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entir...
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VLSI
2010
Springer
14 years 4 months ago
2010
Springer
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
DAC
2007
ACM
15 years 11 months ago
2007
ACM
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
DAC
1998
ACM
15 years 10 months ago
1998
ACM
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...