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ERSA
2003
147views Hardware» more  ERSA 2003»
14 years 11 months ago
Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications
Many embedded applications can benefit from the flexible custom computing opportunities that FPGA technology offers. The Run-Time Reconfiguration (RTR) of the FPGA as an applicati...
Timothy F. Oliver, Douglas L. Maskell
ARC
2006
Springer
135views Hardware» more  ARC 2006»
15 years 1 months ago
QUKU: A Fast Run Time Reconfigurable Platform for Image Edge Detection
To fill the gap between increasing demand for reconfigurability and performance efficiency, CGRAs are seen to be an emerging platform. In this paper, a new architecture, QUKU, is d...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
FPL
2006
Springer
169views Hardware» more  FPL 2006»
15 years 1 months ago
An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic
An improved FPGA implementation of an electronic cochlea filter is presented. We show that by using decimation, the computations of the electronic cochlea can be reduced. Furtherm...
C. K. Wong, Philip Heng Wai Leong
ESANN
2006
14 years 11 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
ICASSP
2011
IEEE
14 years 1 months ago
High-throughput implementation of tree-search algorithms for vector precoding
This contribution analyzes the architecture design and FPGA implementation of high-throughput multiuser vector precoders. The most complex task of such precoders, i.e. the search ...
Maitane Barrenechea, Luis G. Barbero, Idoia Jimene...