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FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
15 years 1 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski
FCCM
2004
IEEE
141views VLSI» more  FCCM 2004»
15 years 1 months ago
Deep Packet Filter with Dedicated Logic and Read Only Memories
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
Young H. Cho, William H. Mangione-Smith
FPGA
2006
ACM
125views FPGA» more  FPGA 2006»
15 years 1 months ago
Armada: timing-driven pipeline-aware routing for FPGAs
While previous research has shown that FPGAs can efficiently implement many types of computations, their flexibility inherently limits their clock rate. Several research groups ha...
Kenneth Eguro, Scott Hauck
FPGA
2000
ACM
119views FPGA» more  FPGA 2000»
15 years 1 months ago
Timing-driven placement for FPGAs
In this paper we introduce a new Simulated Annealingbased timing-driven placement algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a nove...
Alexander Marquardt, Vaughn Betz, Jonathan Rose
FPGA
2008
ACM
129views FPGA» more  FPGA 2008»
14 years 11 months ago
Efficient ASIP design for configurable processors with fine-grained resource sharing
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
Quang Dinh, Deming Chen, Martin D. F. Wong