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ERSA
2006
100views Hardware» more  ERSA 2006»
14 years 11 months ago
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Current FPGAs are heterogeneous partially reconfigurable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By using partial reconfigurat...
Markus Koester, Heiko Kalte, Mario Porrmann
TVLSI
2008
111views more  TVLSI 2008»
14 years 9 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
FCCM
1999
IEEE
146views VLSI» more  FCCM 1999»
15 years 2 months ago
Sepia: Scalable 3D Compositing Using PCI Pamette
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
Laurent Moll, Mark Shand, Alan Heirich
APCSAC
2005
IEEE
15 years 3 months ago
A Stream Architecture Supporting Multiple Stream Execution Models
Multimedia devices demands a platform integrated various functional modules and an increasing support of multiple standards. Stream architecture is able to solve the problem. Howev...
Nan Wu, Mei Wen, Haiyan Li, Li Li, Chunyuan Zhang
ASAP
2008
IEEE
186views Hardware» more  ASAP 2008»
15 years 4 months ago
Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...
Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberla...