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CODES
2005
IEEE
15 years 7 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
140
Voted
ICMCS
1999
IEEE
259views Multimedia» more  ICMCS 1999»
15 years 6 months ago
PhotoBuilder - 3D Models of Architectural Scenes from Uncalibrated Images
We address the problem of recovering 3D models from uncalibrated images of architectural scenes. We propose a simple, geometrically intuitive method which exploits the strong rigi...
Roberto Cipolla, Duncan P. Robertson, Edmond Boyer
117
Voted
POPL
2012
ACM
13 years 9 months ago
A compiler and run-time system for network programming languages
Software-defined networks (SDNs) are a new implementation architecture in which a controller machine manages a distributed collection of switches, by instructing them to install ...
Christopher Monsanto, Nate Foster, Rob Harrison, D...
ICSOC
2004
Springer
15 years 7 months ago
An OGSA-based accounting system for allocation enforcement across HPC centers
In this paper, we present an Open Grid Services Architecture (OGSA)-based decentralized allocation enforcement system, developed with an emphasis on a consistent data model and ea...
Thomas Sandholm, Peter Gardfjäll, Erik Elmrot...
JSA
2010
173views more  JSA 2010»
14 years 8 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...