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» The art of multiprocessor programming
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IPPS
2010
IEEE
14 years 9 months ago
A PRAM-NUMA model of computation for addressing low-TLP workloads
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Martti Forsell
IPPS
2010
IEEE
14 years 9 months ago
User level DB: a debugging API for user-level thread libraries
With the advent of the multicore era, parallel programming is becoming ubiquitous. Multithreading is a common approach to benefit from these architectures. Hybrid M:N libraries lik...
Kevin Pouget, Marc Pérache, Patrick Carriba...

Publication
248views
14 years 9 months ago
Equalizer: A Scalable Parallel Rendering Framework
Continuing improvements in CPU and GPU performances as well as increasing multi-core processor and cluster-based parallelism demand for flexible and scalable parallel rendering sol...
Stefan Eilemann, Maxim Makhinya, Renato Pajarola
TCAD
2010
168views more  TCAD 2010»
14 years 6 months ago
An MILP-Based Performance Analysis Technique for Non-Preemptive Multitasking MPSoC
For real-time applications, it is necessary to estimate the worst-case performance early in the design process without actual hardware implementation. While the non-preemptive task...
Hoeseok Yang, Sungchan Kim, Soonhoi Ha
TPDS
2010
125views more  TPDS 2010»
14 years 6 months ago
Dealing with Transient Faults in the Interconnection Network of CMPs at the Cache Coherence Level
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...
Ricardo Fernández Pascual, José M. G...