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» The art of multiprocessor programming
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FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
15 years 5 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 5 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
ASPLOS
2008
ACM
15 years 1 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
ASPLOS
2008
ACM
15 years 1 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
EUROGRAPHICS
2010
Eurographics
15 years 8 months ago
Adding Depth to Cartoons Using Sparse Depth (In)equalities
This paper presents a novel interactive approach for adding depth information into hand-drawn cartoon images and animations. In comparison to previous depth assignment techniques ...
Daniel Sýkora, David Sedlacek, Sun Jinchao, John ...