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PDPTA
2004
14 years 11 months ago
Static Performance Evaluation for Memory-Bound Computing: The MBRAM Model
We present the MBRAM model for static evaluation of the performance of memory-bound programs. The MBRAM model predicts the actual running time of a memory-bound program directly fr...
Gene Cooperman, Xiaoqin Ma, Viet Ha Nguyen
IEEEPACT
2009
IEEE
14 years 7 months ago
ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs
Abstract--Chip-MultiProcessor (CMP) architectures are becoming more and more popular as an alternative to the traditional processors that only extract instruction-level parallelism...
Carlos Luque, Miquel Moretó, Francisco J. C...
PODC
2010
ACM
15 years 1 months ago
Constant RMR solutions to reader writer synchronization
We study Reader-Writer Exclusion [1], a well-known variant of the Mutual Exclusion problem [2] where processes are divided into two classes–readers and writers–and multiple re...
Vibhor Bhatt, Prasad Jayanti
77
Voted
KDD
1998
ACM
147views Data Mining» more  KDD 1998»
15 years 1 months ago
ADtrees for Fast Counting and for Fast Learning of Association Rules
Abstract: The problem of discovering association rules in large databases has received considerable research attention. Much research has examined the exhaustive discovery of all a...
Brigham S. Anderson, Andrew W. Moore
88
Voted
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
14 years 4 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman