In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
Charles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I...
One of the major issues faced by the semiconductor industry today is that of reducing chip yields. As the process technologies have scaled to smaller feature sizes, chip yields ha...
This paper introduces a new adaptive method, Channel Queue Routing (CQR), for load-balanced routing on k-ary n-cube interconnection networks. CQR estimates global congestion in th...
Arjun Singh, William J. Dally, Amit K. Gupta, Bria...
Abstract. Cloud computing providers have setup several data centers at different geographical locations over the Internet in order to optimally serve needs of their customers aroun...
Rajkumar Buyya, Rajiv Ranjan, Rodrigo N. Calheiros
A number of QoS routing algorithms have been proposed to address the dual objective of selecting feasible paths through the network with enough resources to satisfy a connections&...