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» The design and utility of the ML-RSIM system simulator
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ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
15 years 6 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
FSS
2010
147views more  FSS 2010»
14 years 10 months ago
A divide and conquer method for learning large Fuzzy Cognitive Maps
Fuzzy Cognitive Maps (FCMs) are a convenient tool for modeling and simulating dynamic systems. FCMs were applied in a large number of diverse areas and have already gained momentu...
Wojciech Stach, Lukasz A. Kurgan, Witold Pedrycz
108
Voted
VTC
2006
IEEE
154views Communications» more  VTC 2006»
15 years 5 months ago
Adaptive Modulation and Coding for Bit Interleaved Coded Multiple Beamforming
— Bit interleaved coded multiple beamforming (BICMB) was previously designed to achieve full spatial multiplexing of min(N, M) and full spatial diversity of NM for N transmit and...
Ersin Sengul, Enis Akay, Ender Ayanoglu
99
Voted
ISLPED
2006
ACM
109views Hardware» more  ISLPED 2006»
15 years 5 months ago
Power reduction of multiple disks using dynamic cache resizing and speed control
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Le Cai, Yung-Hsiang Lu
EDCC
2006
Springer
15 years 3 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...