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» The design of a low power asynchronous multiplier
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FPL
2001
Springer
136views Hardware» more  FPL 2001»
15 years 2 months ago
Building Asynchronous Circuits with JBits
Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microproces...
Eric Keller
GLVLSI
2009
IEEE
201views VLSI» more  GLVLSI 2009»
15 years 25 days ago
Glitch-free design for multi-threshold CMOS NCL circuits
In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into async...
Ahmad Al Zahrani, Andrew Bailey, Guoyuan Fu, Jia D...
ISSS
1995
IEEE
117views Hardware» more  ISSS 1995»
15 years 1 months ago
Scheduling and resource binding for low power
Decisions taken at the earliest steps of the design process may have a significantimpact on the characteristics of the final implementation. This paper illustrates how power con...
Enric Musoll, Jordi Cortadella
ISCAS
2003
IEEE
147views Hardware» more  ISCAS 2003»
15 years 2 months ago
Parameterized and low power DSP core for embedded systems
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
Ya-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-J...
62
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DAC
2007
ACM
15 years 10 months ago
Self-Resetting Latches for Asynchronous Micro-Pipelines
Asynchronous circuits are increasingly attractive as low power or high-performance replacements to synchronous designs. A key part of these circuits are asynchronous micropipeline...
Tiberiu Chelcea, Girish Venkataramani, Seth Copen ...