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DSD
2004
IEEE
136views Hardware» more  DSD 2004»
15 years 1 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
TCAD
2008
88views more  TCAD 2008»
14 years 9 months ago
Self-Adaptive Data Caches for Soft-Error Reliability
Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
Shuai Wang, Jie S. Hu, Sotirios G. Ziavras
DAC
2010
ACM
15 years 1 months ago
Towards scalable system-level reliability analysis
State-of-the-art automatic reliability analyses as used in system-level design approaches mainly rely on Binary Decision Diagrams (BDDs) and, thus, face two serious problems: (1) ...
Michael Glaß, Martin Lukasiewycz, Christian ...
TSMC
2010
14 years 4 months ago
Automated Modeling of Dynamic Reliability Block Diagrams Using Colored Petri Nets
Computer system reliability is conventionally modeled and analyzed using techniques such as fault tree analysis (FTA) and reliability block diagrams (RBD), which provide static rep...
Ryan Robidoux, Haiping Xu, Liudong Xing, MengChu Z...
IPSN
2011
Springer
14 years 1 months ago
Radio diversity for reliable communication in WSNs
Deployment of wireless sensors in real world environments is often a frustrating experience. The quality of radio links is highly coupled to unpredictable physical environments, l...
Branislav Kusy, Christian Richter, Wen Hu, Mikhail...