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» The design of a task parallel library
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IEEEPACT
2008
IEEE
15 years 8 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
EUROPAR
2009
Springer
15 years 6 months ago
Automatic Calibration of Performance Models on Heterogeneous Multicore Architectures
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
Cédric Augonnet, Samuel Thibault, Raymond N...
HPCA
2000
IEEE
15 years 5 months ago
Evaluation of Active Disks for Decision Support Databases
Growth and usage trends for large decision support databases indicate that there is a need for architectures that scale the processing power as the dataset grows. To meet this nee...
Mustafa Uysal, Anurag Acharya, Joel H. Saltz
MEMOCODE
2007
IEEE
15 years 7 months ago
Scheduling as Rule Composition
Bluespec is a high-level hardware description language used for architectural exploration, hardware modeling and synthesis of semiconductor chips. In Bluespec, one views hardware ...
Nirav Dave, Arvind, Michael Pellauer
IEEEPACT
2003
IEEE
15 years 6 months ago
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation
In Thread-Level Speculation (TLS), speculative tasks generate memory state that cannot simply be combined with the rest of the system because it is unsafe. One way to deal with th...
María Jesús Garzarán, Milos P...