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» The design of a task parallel library
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VLSISP
1998
128views more  VLSISP 1998»
14 years 11 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
ICPADS
2010
IEEE
14 years 9 months ago
Hybrid Checkpointing for MPI Jobs in HPC Environments
As the core count in high-performance computing systems keeps increasing, faults are becoming common place. Checkpointing addresses such faults but captures full process images ev...
Chao Wang, Frank Mueller, Christian Engelmann, Ste...
IPPS
2010
IEEE
14 years 9 months ago
Robust control-theoretic thermal balancing for server clusters
Thermal management is critical for clusters because of the increasing power consumption of modern processors, compact server architectures and growing server density in data center...
Yong Fu, Chenyang Lu, Hongan Wang
HPDC
2012
IEEE
13 years 2 months ago
Work stealing and persistence-based load balancers for iterative overdecomposed applications
Applications often involve iterative execution of identical or slowly evolving calculations. Such applications require incremental rebalancing to improve load balance across itera...
Jonathan Lifflander, Sriram Krishnamoorthy, Laxmik...
HPCA
2006
IEEE
16 years 4 days ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...