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» The design of a task parallel library
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FPL
2005
Springer
137views Hardware» more  FPL 2005»
15 years 5 months ago
Bitwise Optimised CAM for Network Intrusion Detection Systems
String pattern matching is a computationally expensive task, and when implemented in hardware, it can consume a large amount of resources for processing and storage. This paper pr...
Sherif Yusuf, Wayne Luk
ICPP
2002
IEEE
15 years 4 months ago
Region Synchronization in Message Passing Systems
The development of correct synchronization code for distributed programs is a challenging task. In this paper, we propose an aspect oriented technique for developing synchronizati...
Gurdip Singh, Ye Su
ISCAS
2002
IEEE
111views Hardware» more  ISCAS 2002»
15 years 4 months ago
CASCADE - configurable and scalable DSP environment
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
Tay-Jyi Lin, Chein-Wei Jen
DAC
2004
ACM
15 years 3 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
ISPAN
2005
IEEE
15 years 5 months ago
Supervised Peer-to-Peer Systems
In this paper we present a general methodology for designing supervised peer-to-peer systems. A supervised peer-to-peer system is a system in which the overlay network is formed b...
Kishore Kothapalli, Christian Scheideler