Sciweavers

922 search results - page 180 / 185
» The design of a task parallel library
Sort
View
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
15 years 6 months ago
ECMon: exposing cache events for monitoring
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
Vijay Nagarajan, Rajiv Gupta
98
Voted
EGH
2004
Springer
15 years 5 months ago
Realtime ray tracing of dynamic scenes on an FPGA chip
Realtime ray tracing has recently established itself as a possible alternative to the current rasterization approach for interactive 3D graphics. However, the performance of exist...
Jörg Schmittler, Sven Woop, Daniel Wagner, Wo...
JSA
2010
173views more  JSA 2010»
14 years 6 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...
PLDI
2012
ACM
13 years 2 months ago
Adaptive input-aware compilation for graphics engines
While graphics processing units (GPUs) provide low-cost and efficient platforms for accelerating high performance computations, the tedious process of performance tuning required...
Mehrzad Samadi, Amir Hormati, Mojtaba Mehrara, Jan...
CHI
2007
ACM
16 years 2 days ago
An observational study on information flow during nurses' shift change
We present an observational study that was conducted to guide the design and development of technologies to support information flow during nurses' shift change in a hospital...
Charlotte Tang, M. Sheelagh T. Carpendale