71 search results - page 12 / 15 » The disjunctive decomposition of logic functions |
ASPDAC
1998
ACM
15 years 1 months ago
1998
ACM
—An AND-OR-EXOR network, where the output EXOR gate has only two inputs, is one of the simplest three-level architecture. This network realizes an EXOR of two sum-of-products exp...
STEP
2005
IEEE
15 years 3 months ago
2005
IEEE
The decomposition of design patterns into simpler elements may reduce significantly the creation of variants in forward engineering, while it increases the possibility of identify...
102
click to vote
TPHOL
1999
IEEE
15 years 1 months ago
1999
IEEE
Abstract. We describe the key features of the proof description language of Declare, an experimental theorem prover for higher order logic. We take a somewhat radical approach to p...
CVPR
2005
IEEE
15 years 11 months ago
2005
IEEE
We address the issue of modelling facial expressions for realistic 3D avatar animation. We introduce a hierarchical decomposition of a human face into different components and mod...
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...