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FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
15 years 2 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
MM
2009
ACM
144views Multimedia» more  MM 2009»
15 years 4 months ago
An interactive and multi-level framework for summarising user generated videos
We present an interactive and multi-level abstraction framework for user-generated video (UGV) summarisation, allowing a user the flexibility to select a summarisation criterion ...
Saman Cooray, Hervé Bredin, Li-Qun Xu, Noel...
HICSS
2007
IEEE
116views Biometrics» more  HICSS 2007»
15 years 4 months ago
Fine-Grained and Scalable Approaches for Message Integrity
When we have multiple users compiling a single message, including shared contents, metadata, policy, and so on, the integrity of the contents created by individual users needs to ...
Joon S. Park, Ganesh Devarajan
MICRO
2007
IEEE
141views Hardware» more  MICRO 2007»
15 years 4 months ago
Composable Lightweight Processors
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
Changkyu Kim, Simha Sethumadhavan, M. S. Govindan,...
SC
2005
ACM
15 years 3 months ago
Performance-constrained Distributed DVS Scheduling for Scientific Applications on Power-aware Clusters
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. H...
Rong Ge, Xizhou Feng, Kirk W. Cameron