979 search results - page 114 / 196 » The dynamic granularity memory system |
SENSYS
2006
ACM
15 years 3 months ago
2006
ACM
From experience with wireless sensor networks it has become apparent that dynamic reprogramming of the sensor nodes is a useful feature. The resource constraints in terms of energ...
TC
2008
14 years 9 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
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AADEBUG
2005
Springer
15 years 3 months ago
2005
Springer
Debugging techniques have evolved over the years in response to changes in programming languages, implementation techniques, and user needs. A new type of implementation vehicle f...
FPL
2007
Springer
15 years 4 months ago
2007
Springer
The effect of kernel operations on cache optimisations in a soft-core reconfigurable system is important for dynamic cache switching design. Considering kernel operations changes ...
EUC
2006
Springer
15 years 1 months ago
2006
Springer
As the ever-increasing gap between the speed of processor and the speed of memory has become the cause of one of primary bottlenecks of computer systems, modern architecture system...