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HPCA
2001
IEEE
16 years 5 days ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas
IPPS
1998
IEEE
15 years 4 months ago
Eliminating the Protocol Stack for Socket Based Communication in Shared Memory Interconnects
We show how the traditional protocol stack, such as TCP/IP, can be eliminated for socket based high speed communication within a cluster. The SCI shared memory interconnect is used...
Stein Jørgen Ryan, Haakon Bryhni
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
15 years 6 months ago
Architectural leakage-aware management of partitioned scratchpad memories
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
Olga Golubeva, Mirko Loghi, Massimo Poncino, Enric...
ETFA
2006
IEEE
15 years 5 months ago
Memory-Aware Feedback Scheduling of Control Tasks
This paper presents the incorporation of an auto-tuning real-time garbage collector into a feedback-based on-line scheduling system. The studied feedback scheduler is designed to ...
Sven Gestegard Robertz, Dan Henriksson, Anton Cerv...
NCI
2004
198views Neural Networks» more  NCI 2004»
15 years 1 months ago
A "spiking" bidirectional associative memory for modeling intermodal priming
Starting from a modular artificial neural system modelling the integration of several perceptive stimuli, this article proposes a new implementation of the central module performi...
David Meunier, Hélène Paugam-Moisy