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JSA
2000
115views more  JSA 2000»
14 years 9 months ago
Scheduling optimization through iterative refinement
Scheduling DAGs with communication times is the theoretical basis for achieving efficient parallelism on distributed memory systems. We generalize Graham's task-level in a ma...
Mayez A. Al-Mouhamed, Adel Al-Massarani
HPCA
1995
IEEE
15 years 1 months ago
Program Balance and Its Impact on High Performance RISC Architectures
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
15 years 4 months ago
Virtual hierarchies to support server consolidation
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...
Michael R. Marty, Mark D. Hill
DAC
2004
ACM
15 years 10 months ago
An integrated hardware/software approach for run-time scratchpad management
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
Francesco Poletti, Paul Marchal, David Atienza, Lu...
FASE
2006
Springer
15 years 1 months ago
Trace-Based Memory Aliasing Across Program Versions
One of the major costs of software development is associated with testing and validation of successive versions of software systems. An important problem encountered in testing and...
Murali Krishna Ramanathan, Suresh Jagannathan, Ana...