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GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
14 years 21 days ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
DAC
2007
ACM
14 years 7 months ago
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
14 years 19 days ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...
SIGMETRICS
1993
ACM
123views Hardware» more  SIGMETRICS 1993»
13 years 10 months ago
Effectiveness of Trace Sampling for Performance Debugging Tools
Recently there has been a surge of interest in developing performance debugging tools to help programmers tune their applications for better memory performance [2, 4, 10]. These t...
Margaret Martonosi, Anoop Gupta, Thomas E. Anderso...
CGO
2005
IEEE
13 years 12 months ago
Effective Adaptive Computing Environment Management via Dynamic Optimization
To minimize the surging power consumption of microprocessors, adaptive computing environments (ACEs) where microarchitectural resources can be dynamically tuned to match a program...
Shiwen Hu, Madhavi Gopal Valluri, Lizy Kurian John