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DATE
2009
IEEE
171views Hardware» more  DATE 2009»
15 years 4 months ago
Physically clustered forward body biasing for variability compensation in nanometer CMOS design
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...
100
Voted
DSD
2009
IEEE
136views Hardware» more  DSD 2009»
15 years 4 months ago
An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
Pierfrancesco Foglia, Francesco Panicucci, Cosimo ...
119
Voted
EDBT
2009
ACM
122views Database» more  EDBT 2009»
15 years 4 months ago
Finding the influence set through skylines
Given a set P of products, a set O of customers, and a product p P, a bichromatic reverse skyline query retrieves all the customers in O that do not find any other product in P t...
Xiaobing Wu, Yufei Tao, Raymond Chi-Wing Wong, Lin...
107
Voted
GLOBECOM
2007
IEEE
15 years 4 months ago
Joint Traffic Blocking and Routing Under Network Failures and Maintenances
Under device failures and maintenance activities, network resources reduce and congestion may arise inside networks. As a result, users experience degraded performance on packet d...
Chao Liang, Zihui Ge, Yong Liu
96
Voted
GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
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