Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
Pierfrancesco Foglia, Francesco Panicucci, Cosimo ...
Given a set P of products, a set O of customers, and a product p P, a bichromatic reverse skyline query retrieves all the customers in O that do not find any other product in P t...
Xiaobing Wu, Yufei Tao, Raymond Chi-Wing Wong, Lin...
Under device failures and maintenance activities, network resources reduce and congestion may arise inside networks. As a result, users experience degraded performance on packet d...
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...