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DT
2000
88views more  DT 2000»
14 years 10 months ago
Postsilicon Validation Methodology for Microprocessors
f abstraction as applicable to break the problem's complexity, and innovating better techniques to address complexity of new microarchitectural features. Validation techniques...
Hemant G. Rotithor
IJRR
2000
113views more  IJRR 2000»
14 years 10 months ago
Sensor-Based Exploration: The Hierarchical Generalized Voronoi Graph
The hierarchical generalized Voronoi graph (HGVG) is a new roadmap developed for sensor-based exploration in unknown environments. This paper defines the HGVG structure: a robot c...
Howie Choset, Joel W. Burdick
JIRS
2000
144views more  JIRS 2000»
14 years 10 months ago
An Integrated Approach of Learning, Planning, and Execution
Agents (hardware or software) that act autonomously in an environment have to be able to integrate three basic behaviors: planning, execution, and learning. This integration is man...
Ramón García-Martínez, Daniel...
JUCS
2000
120views more  JUCS 2000»
14 years 10 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
IFE
2007
77views more  IFE 2007»
14 years 10 months ago
Drawing Subway Maps: A Survey
Abstract This paper deals with automating the drawing of subway maps. There are two features of schematic subway maps that make them different from drawings of other networks such...
Alexander Wolff
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