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DAC
2006
ACM
15 years 10 months ago
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S....
CADE
2008
Springer
15 years 9 months ago
Model Stack for the Pervasive Verification of a Microkernel-based Operating System
Abstract. Operating-system verification gains increasing research interest. The complexity of such systems is, however, challenging and many endeavors are limited in some respect: ...
Jan Dörrenbächer, Matthias Daum, Sebasti...
TYPES
1995
Springer
15 years 28 days ago
A Natural Deduction Approach to Dynamic Logic
Natural Deduction style presentations of program logics are useful in view of the implementation of such logics in interactive proof development environments, based on type theory,...
Furio Honsell, Marino Miculan
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 1 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
FLOPS
1999
Springer
15 years 1 months ago
Using Types as Approximations for Type Checking Prolog Programs
Abstract. Subtyping tends to undermine the effects of parametric polymorphism as far as the static detection of type errors is concerned. Starting with this observation we present...
Christoph Beierle, Gregor Meyer