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» The performance of circuit switching in the internet
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ICCD
2003
IEEE
111views Hardware» more  ICCD 2003»
15 years 6 months ago
Routed Inter-ALU Networks for ILP Scalability and Performance
Modern processors rely heavily on broadcast networks to bypass instruction results to dependent instructions in the pipeline. However, as clock rates increase, architectures get w...
Karthikeyan Sankaralingam, Vincent Ajay Singh, Ste...
MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
14 years 7 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim
DAC
1994
ACM
15 years 1 months ago
Routing in a New 2-Dimensional FPGA/FPIC Routing Architecture
- This paper studies the routing problem for a new Field-Programmable Gate Array (FPGA) and Field-Programmable Interconnect Chip (FPIC) routing architecture which improves upon the...
Yachyang Sun, C. L. Liu
BROADNETS
2005
IEEE
15 years 3 months ago
Bandwidth guaranteed multicast scheduling for virtual output queued packet switches
Multicast enables efficient data transmission from one source to multiple destinations, and has been playing an important role in Internet multimedia applications. Although sever...
Deng Pan, Yuanyuan Yang
INFOCOM
2005
IEEE
15 years 3 months ago
Credit based fair scheduling for packet switched networks
With the rapid development of Internet multimedia applications, the next generation of networks is required to schedule not only the best effort traffic but also the traffic wit...
Deng Pan, Yuanyuan Yang