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ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
15 years 2 months ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan
ICRA
1998
IEEE
132views Robotics» more  ICRA 1998»
15 years 2 months ago
Dextrous Manipulation by Rolling and Finger Gaiting
Many practical dextrous manipulation tasks involve large-scale motion of the grasped object while maintaining a stable grasp. To plan such tasks, one must control both the motion ...
Li Han, Jeffrey C. Trinkle
IWPC
1996
IEEE
15 years 1 months ago
The Gadfly: An Approach to Architectural-Level System Comprehension
Technology to support system comprehension tends to reflect either a "bottom-up" or "top-down" approach. Bottom-up approaches attempt to derive system models f...
Kurt C. Wallnau, Paul C. Clements, Edwin J. Morris...
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
15 years 1 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty
FORMATS
2006
Springer
15 years 1 months ago
Symbolic Robustness Analysis of Timed Automata
We propose a symbolic algorithm for the analysis of the robustness of timed automata, that is the correctness of the model in presence of small drifts on the clocks or imprecision ...
Conrado Daws, Piotr Kordy