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HPCA
2005
IEEE
16 years 4 months ago
Effective Instruction Prefetching in Chip Multiprocessors for Modern Commercial Applications
In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
Lawrence Spracklen, Yuan Chou, Santosh G. Abraham
ICFP
2007
ACM
16 years 3 months ago
Type-safe higher-order channels in ML-like languages
As a means of transmitting not only data but also code encapsulated within functions, higher-order channels provide an advanced form of task parallelism in parallel computations. ...
Sungwoo Park
ASIACRYPT
2009
Springer
15 years 10 months ago
Improved Generic Algorithms for 3-Collisions
An r-collision for a function is a set of r distinct inputs with identical outputs. Actually finding r-collisions for a random map over a finite set of cardinality N requires at ...
Antoine Joux, Stefan Lucks
137
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WSFM
2007
Springer
15 years 9 months ago
Event Structure Semantics of Orc
Developing wide-area distributed applications requires jointly analyzing functional and Quality of Service (QoS) aspects, such as timing properties. Labelled transition systems and...
Sidney Rosario, David Kitchin, Albert Benveniste, ...
GECCO
2005
Springer
129views Optimization» more  GECCO 2005»
15 years 9 months ago
Evolutionary change in developmental timing
This paper presents a mutation-based evolutionary algorithm that evolves genotypic genes for regulating developmental timing of phenotypic values. The genotype sequentially genera...
Kei Ohnishi, Kaori Yoshida