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ISCAS
2003
IEEE
91views Hardware» more  ISCAS 2003»
15 years 5 months ago
Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity
The full-custom CMOS realization of a new modular sorting architecture is presented. The high-performance architecture is based on rank ordering, and on efficient implementation o...
Turan Demirci, Ilhan Hatirnaz, Yusuf Leblebici
TC
2010
14 years 6 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
IJCNN
2008
IEEE
15 years 6 months ago
Biologically realizable reward-modulated hebbian training for spiking neural networks
— Spiking neural networks have been shown capable of simulating sigmoidal artificial neural networks providing promising evidence that they too are universal function approximat...
Silvia Ferrari, Bhavesh Mehta, Gianluca Di Muro, A...
XIMEP
2005
ACM
174views Database» more  XIMEP 2005»
15 years 5 months ago
NaXDB - Realizing Pipelined XQuery Processing in a Native XML Database System
Supporting queries and modifications on XML documents is a challenging task, and several related approaches exist. When implementing query and modification languages efficientl...
Jens Hündling, Jan Sievers, Mathias Weske
APCHI
2004
IEEE
15 years 3 months ago
inlineLink: Realization of Inline Expansion Link Methods on a Conventional Web Browser
Conventional web browsing displays a web page inside of a window. In conventional web browsing, following a link replaces the previous document entirely, and the readers tend to lo...
Motoki Miura, Buntarou Shizuki, Jiro Tanaka