This paper proposes the idea of emulating fat-trees in overlays for multi-source multicast applications. Fat-trees are like real trees in that their branches become thicker the clo...
High-end supercomputers are increasingly built out of commodity components, and lack tight integration between the processor and network. This often results in inefficiencies in ...
Christian Bell, Dan Bonachea, Yannick Cote, Jason ...
In this paper we propose a new design methodology targeted for core-based designs using parameterized macrocells (PMC’s). This methodology provides the flexibility for instance...
Makram M. Mansour, Mohammad M. Mansour, Amit Mehro...
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...