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DATE
2004
IEEE
105views Hardware» more  DATE 2004»
15 years 1 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
GRAPHICSINTERFACE
2004
14 years 11 months ago
Revisiting Display Space Management: Understanding Current Practice to Inform Next-generation Design
Most modern computer systems allow the user to control the space allocated to interfaces through a window system. While much of the understanding of how people interact with windo...
Dugald Ralph Hutchings, John T. Stasko
TCOM
2010
107views more  TCOM 2010»
14 years 8 months ago
Near-Capacity Cooperative Space-Time Coding Employing Irregular Design and Successive Relaying
— In this paper, we develop a capacity-approaching Cooperative Space-Time Coding (CSTC) scheme employing irregular design for a twin-relay aided network as an extension of our pr...
Lingkun Kong, Soon Xin Ng, Robert G. Maunder, Lajo...
DAC
2011
ACM
13 years 9 months ago
Supervised design space exploration by compositional approximation of Pareto sets
Technology scaling allows the integration of billions of transistors on the same die but CAD tools struggle in keeping up with the increasing design complexity. Design productivit...
Hung-Yi Liu, Ilias Diakonikolas, Michele Petracca,...
72
Voted
ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
15 years 6 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha