1635 search results - page 15 / 327 » Thermally Aware Design |
DAC
2010
ACM
15 years 1 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
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DAC
2004
ACM
15 years 10 months ago
2004
ACM
Thermal design in sub-100nm technologies is one of the major challenges to the CAD community. In this paper, we first introduce the idea of temperature-aware design. We then propo...
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...
TPDS
2010
14 years 8 months ago
2010
Abstract—A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, highspeed interface to increase the device den...
ISVLSI
2008
IEEE
15 years 4 months ago
2008
IEEE
In high-performance VLSI circuits, the on-chip power densities are playing dominant role due to increased scaling of technology, increasing number of components, frequency and ban...