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MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
15 years 3 months ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....
CODES
2007
IEEE
15 years 4 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
INFOCOM
2012
IEEE
13 years 4 days ago
Link correlation aware opportunistic routing
—By exploiting reception diversity of wireless network links, researchers have shown that opportunistic routing can improve network performance significantly over traditional ro...
Anas Basalamah, Song Min Kim, Shuo Guo, Tian He, Y...
CHI
2005
ACM
15 years 10 months ago
Awareness systems: known results, theory, concepts and future challenges
The Community Bar is a groupware tool supporting informal awareness and casual interaction for small communities of intimate collaborators. Its conceptual design is primarily base...
Panos Markopoulos, Boris E. R. de Ruyter, Wendy E....
TARK
2009
Springer
15 years 4 months ago
A computational theory of awareness and decision making
We exhibit a new computational-based definition of awareness, informally that our level of unawareness of an object is the amount of time needed to generate that object within a ...
Nikhil R. Devanur, Lance Fortnow