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ISVLSI
2006
IEEE
149views VLSI» more  ISVLSI 2006»
15 years 5 months ago
Defect-Aware Design Paradigm for Reconfigurable Architectures
With advances in process technology, the feature sizes are decreasing, which leads to higher defect densities. More sophisticated techniques, at increased costs are required to av...
Rahul Jain, Anindita Mukherjee, Kolin Paul
ICN
2009
Springer
15 years 4 months ago
New Algorithm for the Design of Topology Aware Hypercube in Multi-hop Ad Hoc Networks
Securing group communications in resource constrained, infrastructure-less environments such as Mobile Ad Hoc Networks (MANETs) has become one of the most challenging research dire...
Maria Striki, Kyriakos Manousakis, John S. Baras
PERCOM
2006
ACM
15 years 11 months ago
Unearthing Design Patterns to Support Context-Awareness
The lack of structured methodologies and software engineering efforts on designing the support of contextawareness in pervasive systems hinders the potential advantages of analyzi...
Oriana Riva, Cristiano di Flora, Stefano Russo, Ki...
IEEEPACT
2007
IEEE
15 years 6 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Speed binning aware design methodology to improve profit under parameter variations
—Designing high-performance systems with high yield under parameter variations has raised serious design challenges in nanometer technologies. In this paper, we propose a profit-...
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saib...