Abstract-- This paper proposes a novel power-aware multifrequency wrapper architecture design to achieve at-speed testability. The trade-offs between power dissipation, scan time a...
We present the design exploration of a System-on-Chip architecture dedicated to the implementation of the HIPERLAN/2 communication protocol. The task was accomplished by means of ...
Francesco Menichelli, Mauro Olivieri, Luca Benini,...
Since contextual information has potential to improve task-based applications, we provide an approach for integrating contextual information in task-based applications by consideri...
This paper presents an end-to-end synthesis technique for lowpower distributed real-time system design. This technique synthesizes supply voltages of resources to optimize system-...
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...