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DAC
2005
ACM
15 years 7 months ago
Exploring technology alternatives for nano-scale FPGA interconnects
Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular. With their regular structures, they are particularly amenable to scaling to smaller technologies. On the ...
Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane I...
CORR
2008
Springer
77views Education» more  CORR 2008»
15 years 5 months ago
A Reconfigurable Impedance Matching Network Employing RF-MEMS Switches
We propose the design of a reconfigurable impedance matching network for the lower RF frequency band, based on a developed RF-MEMS technology. The circuit is composed of RF-MEMS o...
Marco Bedani, F. Carozza, Roberto Gaddi, Antonio G...
DAM
2006
120views more  DAM 2006»
15 years 5 months ago
A bijection between permutations and floorplans, and its applications
A floorplan represents the relative relations between modules on an integrated circuit. Floorplans are commonly classified as slicing, mosaic, or general. Separable and Baxter per...
Eyal Ackerman, Gill Barequet, Ron Y. Pinter
FPGA
2011
ACM
401views FPGA» more  FPGA 2011»
14 years 8 months ago
LegUp: high-level synthesis for FPGA-based processor/accelerator systems
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zh...
DAC
2011
ACM
14 years 4 months ago
Full-chip TSV-to-TSV coupling analysis and optimization in 3D IC
This paper studies TSV-to-TSV coupling in 3D ICs. A full-chip SI analysis flow is proposed based on the proposed coupling model. Analysis results show that TSVs cause significan...
Chang Liu, Taigon Song, Jonghyun Cho, Joohee Kim, ...